Python-based Trace and Debug of FPGA Designs
In the hardware development space, field programmable gate arrays (FPGAs) are in a unique position as a result of their in-field re-programmability. In contrast to the traditional design process of integrated circuits, FPGAs allow iterative de- velopment workflows closely resembling software development’s sprint-based pro- totyping. For this to work, efficient workflows for verification are key. V
